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Chinese domestic chip development has accelerated under export control pressure, with Huawei Ascend 910C/910D and SMIC-fabricated alternatives showing measurable capability gains. By December 2028, the H100 will be a six-year-old part — single-chip parity with an aging benchmark is materially easier than frontier parity. The verification path is the critical question: Chinese vendors do not submit to MLPerf, so the path to 'verified parity' runs through SemiAnalysis-style independent system testing or equivalent independent technical media coverage of standardized benchmarks. The political incentive to claim parity exceeds the technical incentive to demonstrate it; verification standards matter.
TRUE if a Chinese-designed, China-fabricated AI chip is verified by independent third-party benchmark (not vendor or state-sponsored testing) to match or exceed Nvidia H100 performance on standardized AI training (MLPerf) or inference (industry-standard benchmarks) workloads, with results published in peer-reviewed journals or independent technical media (e.g., SemiAnalysis, Chips and Cheese, equivalent) before Dec 31, 2028.
Russian DeepSeek deployment in sophisticated attacks (Story 7) confirms Chinese open-weight models are frontier-capable in real-world deployment
China 3.8 trillion yuan 5-year plan creates unprecedented state-level incentive
H100 is 2022 chip — six-year-old benchmark by Dec 2028 eases the parity target
839 days remaining provides substantial runway
Russian AI attacks using DeepSeek (Story 7) will trigger calls for restrictions on Chinese open-weight model distribution and additional export controls — increases US determination to maintain hardware gap
Cruz-Thune-Klobuchar bill (Story 5) bipartisan AI safety momentum could include tighter export control provisions targeting Chinese chip development
Software efficiency of Chinese AI (demonstrated by DeepSeek attacks) paradoxically reduces commercial pressure to demonstrate hardware parity
Chinese vendors do not submit to MLPerf — verification path structurally unresolved
US inference silicon ecosystem advancing — moving target problem
Cumulative +55pt drift from null initial warrants calibration caution
Export controls limit access to advanced lithography — hardware ceiling persists